1. Field of the Invention
The present invention relates to a solid-state imaging device, a manufacturing method of the same, and an imaging apparatus.
2. Description of Related Art
A solid-state imaging device including both a vertical transistor and a planar transistor is disclosed (e.g., see JP-A-2005-223084).
It is very difficult to make both the vertical transistor and a CMOSFET (e.g., CMOSFET following the design rule of 0.18 μm or less) including the planar transistor on the same substrate.
For example, the case where non-doped polysilicon is used for the respective gate electrodes of the vertical transistor and the planar transistor will be described.
When a vertical hole of the vertical transistor is filled with non-doped polysilicon for gate electrode and closed, it becomes difficult to dope the polysilicon in the deep part of the vertical hole in the substrate.
For example, there is a method of filling the vertical hole forming the vertical transistor with polysilicon, and then, diffusing an impurity at high density of 1×1020 cm−3 from the surface to the bottom of the polysilicon filling in the vertical hole by thermal diffusion (see JP-A-2001-189456).
However, if the heat that diffuses the impurity at high density of 1×1020 cm−3 to the bottom of the polysilicon filling in the vertical hole is applied, in the planar CMOSFET part, the device isolation function is deteriorated due to thermal diffusion of the device isolation region formed by the diffusion layer. Further, if the impurity is allowed to reach the bottom of the vertical hole by ion implantation, the high-density impurity is implanted into the silicon substrate, and it may be impossible to form the channel of the vertical transistor.
Accordingly, it has been difficult to mount both the planar CMOSFET and the vertical transistor on the same semiconductor substrate.